As chip miniaturization continues to increase, conventional housing technology such as is known from the document U.S. Pat. No. 6,319,755 B1 or from the document U.S. Pat. No. 6,249,041 B1 for semiconductor devices of this type is reaching its limits, especially as the housing technology cannot be reduced to the same extent as the miniaturization of the power semiconductor chips. In this case, heat dissipation and the limited current density are a main problem which severely limits or impairs the functionality of the high power semiconductors.
For these and other reasons there is a need for the present invention.